The present invention relates in general to semiconductor devices, and in particular to a dielectrically isolated (DI) island architecture in which the island's defining dielectric is contoured inwardly to form one or more projections for the purpose of assuring electrical separation of two regions of the island by a well, that is, for assuring formation of a bottomed well. The present invention has particular utility in the manufacture of integrated circuit switches.
The designers and manufacturers of semiconductor integrated circuits may be faced with competing design criteria when attempting to use a well that extends to the bottom of the island to isolate two regions of the island. For example, in the diffusion doping of an island to form a well, the lateral extent of the well is a function of its depth, generally about 0.5 to 0.8 of the depth. While the lateral extent of the well must be increased to increase the depth of the well, any increase in the lateral extent is generally undesirable from a surface utilization viewpoint.
Moreover, it is sometimes desirable that, within a wafer or an island, some wells reach the bottom of the island and that some wells do not. Since more time is required to diffuse deeper wells, wells of differing depth cannot be diffused in the same processing step. Sequential diffusion of wells of different depth significantly increases manufacturing time.
Further, the depth of a well is not linearly related to diffusion time and significant time may be saved by reducing the depth of a well.
All of these problems are compounded by differing island thickness requirements imposed by other components of the integrated circuit not associated with a particular well.
Finally, there may be significant variations in both island thickness and well depth inherent in the manufacturing process.
In the present invention, local thinning of a dielectrically isolated island so that selected wells are assured of reaching the bottom of the island without additional processing steps is accomplished by controllably tailoring the contour of the island's bottom during anisotropic etching of the island isolation patterns in the wafer. The resulting structure contains one or more projections that extend into the dielectrically isolated island to penetrate the selected wells thereafter diffused into the island. By so doing, contact between the selected wells and the dielectric on the bottom of the island at the projections is assured. Because isolation of two regions of the island (i.e., contact of the well with the dielectric) is required laterally as well as vertically, the process and structure hereinafter described is applicable to any inwardly extending projection (e.g., into the sides and/or bottom of the island).
Projections that extend upwardly into the bottom of a dielectrically isolated island are known. See, for example, Japanese Patent Number 1-115,1352 to Miyano in which a single projection into the bottom of a dielectrically isolated island is shown in a thickness gage, with the thickness of the island being indicated by the resistance value measured between gage contacts on opposite sides of the projection, and with the resistance value being responsive to the depth of penetration, if any, of the projection into the surface resistance layer. Further, the projection may actually cut the island in two when the island is too thin. In such gages, the projection is used merely to determine the depth of the island, the surface resistance layer is not part of the integrated circuit, and the gage contacts are not the contacts of the integrated circuit.
In other known constructions, upward projections are used for reducing the thickness of the layer underlying a topgate in a discrete JFET (U.S. Pat. No. 4,602,419 to Harrison, et al.), for improving frequency response in a discrete JFET (U.S. Pat. No. 3,378,737 to Welty), for reducing series resistance (collector of bipolar transistor; drain of DMOS) where reduced breakdown voltage can be tolerated (Japan Patent No. 1-169,961 to Otowa), and for reducing base-collector capacitance in a junction isolated PNP transistor (Ziegler, et al., "Self-Isolating Bathtub Collector for a Planer Transistor" in IBM Technical Disclosure Bulletin, Volume 14, No. 5, Oct. 1971, pages 1635-1636).
However, in no known integrated circuit is a dielectric projection selectively positioned to ensure well contact.
Accordingly, it is an object of one aspect of the present invention to provide a novel semiconductor structure and method that obviates many of the problems of the prior art.
It is a further object of the present invention to provide a novel method and structure by which contact between a well and the bottom of a dielectrically isolated island may be assured despite variations in the thickness of the island and the depth of the well.
It is another object of the present invention to provide a novel method and structure by which electrical isolation of two regions in a dielectrically isolated island may be assured.
Integrated circuit switches are frequently used to replace space-consuming and troubled-prone electromechanical switches in various applications, such as the test access switches in telephone subscriber line interface circuits (SLICs). The switches, when not on, must block the maximum circuit voltage that may exceed several hundred volts.
Various types of integrated circuit switches are known, and as shown in FIG. 1, such a switch may be formed in an island 10 that is dielectrically isolated from a surrounding substrate 12 by a dielectric layer 14. Switch contacts S1 and S2 may be electrically connected to material of a predetermined conductivity type (e.g., n-type) in a layer 16. The layer 16 is desirably separated into two regions 16A and 16B by a well 18 of material having a conductivity opposite the conductivity of the material in layer 16 (e.g., p-type). Each of the regions 16A and 16B may be electrically connected to one the switch contacts S1 and S2 and the conduction of current between S1 and S2 may be a function of the bias applied to the well 18.
In a switch which has found application in telephony, the switch may include two back-to-back bipolar junction transistors by the addition of a common emitter E inside the well 18 (the base), with the two regions 16A and 16B serving as the collectors of the two transistors. Appropriately biased, the switch is able to completely block current between S1 and S2 when the well 18 provides complete electrical isolation of the two regions 16A and 16B. Switches of this type are illustrated in the copending application Ser. No. 840,547 of John Prentice filed concurrently herewith and assigned to the assignee hereof, and the disclosure thereof is hereby incorporated herein by reference.
However, the process for manufacturing the integrated circuit switch shown in FIG. 1 may not be sufficiently precise (within reasonably competitive manufacturing cost limits) so as to assure that the well 18 will completely separate the regions 16A and 16B. As may be seen in FIG. 2, the well 18 may not reach the bottom 19 of the island 10, thereby allowing the switch to conduct even when the well 18 is not biased.
In the manufacturing process the well 18 may not reach the bottom of the island 10 if the island 10 is too thick or the well 18 is not deep enough. Typically, the thickness of the island and/or the depth of the well are controllable between maximums and minimums that are determinable, although the thickness and depth are not controllable to a degree to which contact of the well with the bottom of the island may be assured in all instances. For example, in high voltage switches for SLICs, island thicknesses may vary from less than fifteen microns to more than twenty-two microns, and the well 18 may be doped so as to reach a depth of between eighteen and twenty-two microns, leaving a potential four micron gap between the well and the bottom of the island in some switches.
The failure of the well 18 to reach the bottom 19 of the island 16 may also result from the desire to have all wells the same depth because they can then be simultaneously diffused. In addition, the condition illustrated in FIG. 2 may result where the thickness of the island is greater than nominal well depth because of a requirement elsewhere on the wafer for a relatively thicker island, or where it is desirable that some wells bottom and that some do not.
It is accordingly object of another aspect of the present invention to provide a novel integrated circuit switch and method of manufacturing with assured electrical isolation of the switch contacts.
These and many other objects and advantages will be readily apparent to one skilled in the art to which the invention pertains from a perusal of the claims, the appended drawings, and the following detailed description of preferred embodiments.